The present invention relates to digitally encoding and decoding analog signals which, for example, carry audio information, and more particularly relates to delta modulation coders.
In a delta modulation method of digital coding, analog signals are represented by a one-bit wide binary bit stream (of logical 1's and 0's). The encoded digital signal represents the slopes of individual line segments which together approximate the analog signal. The digital signal is generated by determining, for each segment, the difference between the analog signal and a reference signal which is a reconstructed approximation of the original analog signal. The digital signal represents, at sequential points in time, whether the analog signal is greater or less than a proportion of the reference, and the slope of the reference is made positive or negative accordingly to more closely approximate the analog signal.
The encoded digital signal can be stored for short or long periods of delay for later playback or may be transmitted or broadcast in its digital form, all with little or no signal degradation. In some specific applications, a well-designed delta modulation circuit can give superior results as compared to pulse code modulation circuits (where the amplitude of each sample is represented by typically 8 to 16 bits) of the same total bit rate. Additionally, the delta modulation circuitry is generally much simpler and, therefore, less expensive.
A delta modulation decoder (for converting digital to analog) consists primarily of an integrator which produces an output signal having a plurality of line segments. The line segment outputs have a positive slope for one input logic state and a negative slope for the other input logic state. With appropriate encoded digital data, an approximation to the original analog input signal will be produced by the line segment outputs.
A delta modulation encoder (for converting analog to digital) contains a similar integrator which includes feedback from the encoded digital output. The output of the encoder integrator (the reference signal) is compared to the analog input signal to determine the next proper digital output logic state which will cause the reference signal to approach the input analog signal.
Basic delta modulation circuits are limited in their dynamic range; that is, the ability to accurately encode and decode high and low level signals. High level, high frequency signals are distorted by "slope overload," a condition in which the rat of change of the output of the integrator is insufficient to follow the analog signal. The accuracy of low level signals is limited by noise, distorting and "squeals" (beat tones) produced by the jagged approximation of the analog signal.
Heretofore, the dynamic range of delta modulation circuits has been widened at both ends by increasing the bit rate, but for practical and economic reasons, this rate should be minimized. Additionally, positive/negative slope assymetry has been employed in the integrator to move the squeals in the "idle state" (no analog input signal) predominantly above the relevant signal passband. Also, dither noise has been added to the encoder input or comparator input to transform squeal at idle and distortion at low signal levels into random noise (hiss). Also complementary high frequency pre-emphasis and de-emphasis can be used in the encoder and decoder, respectively, to reduce high frequency noise but with a corresponding lower high frequency overload point.
Beyond this, the dynamic range (but not the maximum signal-to-noise ratio) can be improved substantially by adapting the magnitude of the integrator slope (or "step" size) to the maximum magnitude of the slope of the analog input signal This is often accomplished by increasing the integrator slope upwards relative to a low value at idle in response to an excessive number of consecutive 1's or 0's in the bit stream (indicating the onset of slope overload).
Several desirable characteristics of high quality adaptive delta modulation circuitry of this type have, heretofore, been difficult to obtain, particularly in a simple and inexpensive manner.
It is therefore an object of the present invention to provide a simple and inexpensive adaptive delta modulation circuitry.
It is another object of the present invention to provide slope adapting circuitry which responds similarly to similar relative changes in signal slope throughout a wide adaptation range.
It is yet another object to provide slope adapting circuitry which responds quickly to a rapid increase in signal slope without significant "overshoot" (excessive increase in integrator slope).
It is another object to provide slope adapting circuitry which provides a simple interface between the digital slope overload sensing circuitry, which will typically be powered from a single-polarity low voltage (+5 volt) power supply, and the analog adaptation and signal handling circuitry, which will typically be powered from a bipolar, higher voltage (.+-.15 volts) power supply, while still allowing for isolation of digital circuitry noise from the analog circuitry.
It is another object to provide integrator circuitry which interfaces between the digital circuitry and the analog circuitry, typically powered from the just mentioned differing supplies, and which isolates digital circuitry noise from the analog circuitry.
It is another object to provide integrator circuitry which has its positive and negative slopes controlled without significant symmetry matching errors between encoder and decoder due to parts tolerances and switch timing errors.